During the Action, the following STSMs have taken place:

• Ian Kaštil Brno University of Technology
  Host: Cristiana Bolchini, Politecnico di Milano
  Topic: Testing qualities of methodologies increasing reliability of digital systems
  Short description: The main goal of the mission was to improve of the SEU injector developed in my previous research at BUT. The proposed improvement was to implement transformation from the name of the component in the design to the set of bits in the configuration that are used to describe the configuration of the specified component. This improvement would allow faster testing of the methodologies for the hardening FPGA designs by placing SEU only to bits that can have an affect on the whole design. For example if the specific LUT is not connected to the design, changes in its function have no affect to the whole functionality and therefore the injecting SEU into the configuration bits of this LUT does not bring any new information about the reliability of the design.

• Marcela Šimková Brno University of Technology
  Host: Cristiana Bolchini, Politecnico di Milano
  Topic: Testing of qualities of fault-tolerant methodologies to increase the reliability of digital systems
  Short description: The research was aimed at the comparison of two techniques for production of input vectors/patterns which are used for testing qualities of different reliability mechanisms commonly used in fault-tolerant systems based on FPGAs. The first one is known as ATPG (Automatic Test Pattern Generation) which is the prevalent approach used in the area of fault-tolerant systems. The second one uses various techniques of functional verification for generation of proper test patterns.

• Cristiana Bolchini Politecnico di Milano
  Host: Mihalis Psarakis, University of Piraeus
  Topic: Self-Healing Processors on SRAM-based FPGAs
  Short description: The STSM allowed for a joint refinement of the design and implementation of a processor with self-healing capabilities implemented on reconfigurable fabric (FPGA), to finalize an on-going collaboration fostered by the Action on this issue. In the past months we have been working to tackle the various issues of the fault detection and reconfiguration strategies. The research is now focused on the exploration of the design space to compare different alternatives in order to select the most promising ones.

• Antonio Miele Politecnico di Milano
  Host: Mihalis Psarakis, University of Piraeus
  Topic: Implementation of self-healing processors on SRAM-based FPGAs
  Short description: The STSM has been exploited to carry out experiments for a proposed methodology for the design of self-healing processors on SRAM-based FPGAs, based on the autonomous management of errors deriving from SEUs. The contributions from the two research groups have been integrated to support the design and implementation of the robust processor.