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COST Action IC1103

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First international training school on

Manufacturable and Dependable Multi-core Architectures at Nanoscale

CNR Piazzale Aldo Moro, Rome

16-18 September 2013

 


The objectives of this 3-days Training School are to educate participants on the challenges of designing complex multi-core architectures able to fulfil the unavoidable constraints in terms of dependability and manufacturability required by current systems.

The participants will be made aware of the current dependability trends and challenges with respect to nanoscale technologies and multi-core architectures. In particular, a bottom-up approach will be adopted, starting from the fundamental concepts related to dependability models, analysis and design aspects.
First, the basics on the failure mechanisms and modeling affecting nanoscale technology will be provided, subsequently the participants will be introduced to the techniques of reliability evaluation and fault tolerant design techniques. Finally the system-level dependability perspective will be introduced, leveraging on the architectural multi-core features.

The training school is particularly targeted to:

  • Graduate students who want to learn about dependability-related aspects with respect to technology and architectural challenges of multi-core designs;
  • Engineering faculty and post-doc researchers who wish to expand their research horizons;
  • Engineers and researchers in the industry who want to learn the basic principles of manufacturability and dependability.

Participants will have the opportunity to present their own latest research achievements by contributing to a poster session specifically organized to this purpose.

Topics

The program of the school has been prepared with the aim of providing a solid background on the fundamental concepts of the design and analysis of today and tomorrows’s dependable multi-core systems, and an overview of cutting-edge solutions.
The topics presented will cover the following areas of interest:

  • Current trends and challenges of technology at nanoscale, in multicore architectures
  • Failure mechanisms & fault modeling
  • Reliability modeling and analysis techniques
  • Fault tolerance and mitigation techniques at different levels of abstraction
    • Redundancy-based techniques
    • Hardware and Software techniques

Participants will have the opportunity to present their own work in the field in a special poster session, to share ideas and experiences.

Lecturers

  • Said Hamdioui (University of Delft)
  • Ben Kaczer (IMEC Belgium)
  • Shidhartha Das (ARM)
  • Israel Koren (Umass Amherst)
  • Vilas Sridharan (AMD)
  • Viacheslav Izosimov (Semcon AB)

Registration deadline: June 30, 2013

The number of participants is not limited, and the school has no registration fee. MEDIAN COST Action will provide grants to cover the travelling and accommodation expenses, therefore, the registration process consists of two steps:

  1. All interested persons are invited to register here Registration closed
  2. Selected applicants will receive a confirmation e-mail providing the information on how to apply for the reimbursement of their expenses (to be done, after the school)

Download school flyer (pdf).

 
 

COST is supported by the EU Framework Programme Horizon 2020