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COST Action IC1103

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Second Workshop on Manufacturable and Dependable
Multicore Architectures at Nanoscale (MEDIAN'13)
Avignon, France, May 30-31, 2013

Message from the Organizers
Cristiana Bolchini, Salvatore Pontarelli, MEDIAN’13 General Chairs
Lorena Anghel, Dimitris Gizopoulos, MEDIAN’13 Program Chairs

Message from the COST Action Chair
Marco Ottavi

Efficient Error Detection in Double Error Correction Orthogonal Latin Squares Codes
P. Reviriego, S.-F. Liu, S. Lee and J. A. Maestro

Enhanced Decoding of Triple Error Correction Reed-Muller Codes to Reduce Silent Data Corruption in Memories
C. Argyrides, P. Reviriego, C. Kokkinos and J. A. Maestro

Board-level functional fault diagnosis using data mining
C. Bolchini, E. Quintarelli and P. Garza

Particle Strikes in C-Gates: Relevance of SET Shapes
R. Najvirt, V. S. Veeravalli and A. Steininger

Quantitative Analysis of Soft Error Propagation at RTL
L. Chen, M. Ebrahimi and M. B. Tahoori

Challenges of minimum-energy operation in sub-65nm technologies
M. Hiienkari, J. Mäkipää, M. Turnquist and L. Koskinen

A Standards Based Approach to the Reliability Specification of IP Components
A. Evans, D. Alexandrescu, E. Costenaro and M. Nicolaidis

An Embedded Health-Monitoring Infrastructure for a Reliable Multi-core Processor
Y. Zhao and H. Kerkhoff

Analysis and Comparison of Functional Verification and ATPG for Testing Design Reliability
M. Šimková, Z. Kotásek and C. Bolchini

SEU and SET-tolerant ARM Cortex-R4 CPU for Space and Avionics Applications
M. Ghahroodi, E. Ozer and D. Bull

Posters

Error Resilience Exploration in 3D Systems
L. Anghel, V. Pasca, M. Benabdenbi

Power-Intent Integration into the Digital System Specification Model
D. Macko and K. Jelemenská

Sychronization Technique for TMR System After Dynamic Reconguration on FPGA
L. Mičulka and Z. Kotásek

Some measures of self-repairing ability for fault-tolerant circuits design
S. Frenkel

Input vector monitoring concurrent BIST with Low hardware overhead
I. Voyiatzis, C. Efstathiou, C. Sgouropoulou and D. Magos

A Clock Signal Stretching Circuit for Timing Error Prevention In Moderate Digital Systems
J. Mäkipää, M. Hiienkari, M. Turnquist and L. Koskinen

A Reliable Throughput Gain on GPUs
P. Rech and L. Carro

The Use of Game Theory Within Automotive Job Scheduling
J. Docherty, A. Bystrov and A. Yakovlev

 
 

COST is supported by the EU Framework Programme Horizon 2020