IEEE Trans. on Computers and IEEE Trans. on Nanotechnology

The IEEE Transactions on Computers and IEEE Transactions on Nanotechnology seek original manuscripts for a Joint Special Section on Defect and Fault Tolerance in VLSI and Nanotechnology Systems scheduled to appear in the issue of March 2016.

More information is available here.

Important dates

Guest editors

• Cristiana Bolchini (Politecnico di Milano, Italy)
• Sandip Kundu (University of Massachusetts, Amherst, USA)
• Salvatore Pontarelli (CNIT – Italian Inter-University Consortium of Telecommunications, Italy)

The event has attracted a lot of attendees from both COST Actions. The picture taken in-between the poster sessions is reported below.

Joint MEDIAN-TRUDEVICE Open Forum in Amsterdam: Participants

The program for the joint open forum is available for download: booklet.

The manuscript “Dependable Multicore Architectures at Nanoscale and their Applications: the view from Europe” authored by several MEDIAN members has been accepted for publication in the Tutorial issue of IEEE Design & Test. All the details as soon as the paper appears in the magazine.

COST Actions MEDIAN and TRUDEVICE are jointly organizing an Open Forum to be held on Sep. 30, 2014 in Amsterdam, co-Located with the Int. Symp. on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT 2014).
More details are available on the specific event page.

The third edition of the MEDIAN workshop held in Dresden, in co-location with DATE 2014 has been a success, attracting more than 30 participants.

A picture taken just before lunch captured most of the participants.

Participants @ 3rd MEDIAN workshop in Dresden. March 28, 2014.

The joint Euro-TM/MEDIAN workshop in Vienna has been a success, with about 50 registered participants from MEDIAN.

A picture taken just before lunch captured most of the participants.

The program for the third MEDIAN workshop is available here, together with information for registering to the event. Early registration deadline is Feb. 28, 2014.

MEDIAN is at HiPEAC 2014 with the Joint Euro-TM/MEDIAN Workshop on Dependable Multicore and Transactional Memory Systems (DMTM) (link).
The event is held on Wed. January 22, 2014, 10:00 – 18:00 and sessions will be at the Intercontinental Hotel.

The DMTM workshop, co-organized by the COST Actions Euro-TM (http://www.eurotm.org) and MEDIAN, aims to bring together these two relevant and timely topics. While papers covering both Transactional Memory and Dependability are ideal, papers in only one of the two topics are welcome as well.

Held in conjunction with the 9th International Conference on High-Performance and Embedded Architectures and Compilers (HiPEAC). Vienna, Austria, January 22, 2014

Workshop website: http://dmtm.site.ac.upc.edu/

Topic of Interest
Hardware and software techniques to enhance dependability of multi-core systems and parallel applications
Transactional Memory (TM) and its applications for failure-isolation, failure-atomicity and real-time systems
Methodologies and tools for the development of concurrent applications for embedded systems
Correctness, performance, testing and debugging of TM and multi-core applications
Hardware, OS and language supports for TM and other programming paradigms for concurrent programming
Energy/reliability/performance tradeoffs
Fault-Tolerant micro-architectures and parallel system architectures
Compiler/architecture/OS methodologies and strategies for reliability
Error modeling, detection, correction, and tolerance for transient and permanent errors in multi-core architectures
Reliable on-chip communications

Important Dates
Abstracts’ submission: November 22nd, 2013
Author notification: December 6th, 2013

Submission Instructions
The workshop will consist of short presentations. To facilitate later submission to other venues, DMTM will not have published proceedings.

Please submit a two pages maximum describing your research-in-progress at EasyChair:
https://www.easychair.org/conferences/?conf=dmtm2014

Program Committee

Prof. Gilles Muller. LIP6
Dr. Heiko Falk . Ulm University
Prof. Luis Rodrigues, IST Lisbon
Dr. Marc Shapiro
Dr. Maria Michael, University of Cyprus
Dr. Marco Ottavi, University of Rome “Tor Vergata”
Dr. Oğuz Ergin, TOBB University of Economics and Technology
Dr. Osman Unsal. Barcelona Supercomputing Center
Prof. Pascal Felber,University of Neuchatel
Dr. Pedro Reviriego, Universidad Antonio de Nebrija
Dr. Ruben Titos. Chalmers University of Technology
Dr. Salvatore Pontarelli. University of Rome “Tor Vergata”
Dr. Theocharis Theocharides. University of Cyprus
Dr. Yiannakis Sazeides. University of Cyprus
Prof. Dr. Wolfgang Karl, Karlsruhe Institute of Technology (KIT)

Steering Committee

Prof. Paolo Romano, Euro-TM Action Chair, IST Lisbon, Portugal
Dr. Marc Shapiro, Euro-TM Vice Action Chair, LIP6, France
Prof. Luis Rodrigues, Euro-TM WG1 Leader, IST Lisbon, Portugal
Dr. Tim Harris, Euro-TM WG2 Leader, Oracle Labs, UK
Prof. Gilles Muller, Euro-TM WG3 Leader, LIP6, France
Prof. Wolfgang Karl, Euro-TM WG4 Leader, KIT, Germany
Prof. Pascal Felber, Euro-TM WG5 Leader, University of Neuchatel, Switzerland

Dr. Marco Ottavi MEDIAN Action Chair, University of Rome “Tor Vergata”, Italy
Prof. Lorena Anghel MEDIAN WG1 Leader Grenoble INP, TIMA Lab, France
Prof. Cristiana Bolchini MEDIAN WG2 Leader, Politecnico di Milano, Italy
Prof. Dimitris Gizopoulos MEDIAN WG3 Leader, University of Athens, Greece
Prof. Antonis Paschalis MEDIAN WG4 Leader, University of Athens, Greece
Prof. Oliver Bringmann MEDIAN WG5 Leader, FZI Karlsruhe, Germany
Dr. Hans Manhaeve MEDIAN WG6 Leader, Ridgetop Europe, Belgium

Program Chair

Dr. Adrián Cristal, Barcelona Supercomputing Center – Universistat Politecnica de Catalunya – adrian.cristal@bsc.es