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COST Action IC1103

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The First Workshop on Manufacturable and Dependable
Multicore Architectures at Nanoscale (MEDIAN'12)
Annecy, France, June 1st, 2012

Call for Papers

Constant advances in manufacturing yield and field reliability are important enabling factors for electronic devices pervading our lives, from medical to consumer electronics, from railways to the automotive and avionics scenarios. At the same time, both technology and architectures are today at a turning point; many ideas are being proposed to postpone the end of Moore’s law such as extending CMOS technology as well as finding alternatives to it like CNTFET, QCA, memristors, etc., while at the architectural level, the spin towards higher frequencies and aggressive dynamic instruction scheduling has been replaced by the trend of including many simpler cores on a single die. These paradigm shifts imply new dependability issues and thus require a rethinking of design, manufacturing, testing, and validation of reliable next-generation systems. These manufacturability and dependability issues will be resolved efficiently only if a cross-layer approach that takes into account technology, circuit and architectural aspects will be developed.

In the framework of the COST Action IC1103 – MEDIAN, (Manufacturable and Dependable Multicore Architectures at Nanoscale) this Workshop will provide an open forum for presentations in the above-mentioned fields. The topics include (but are not limited to) the following ones:

  1. Methodologies and techniques for manufacturing reliable nanoscale devices
  2. System level design, on-line testing/fault tolerance
  3. Verification and Validation/Debug Methodologies
  4. Fault tolerance for space applications
  5. Fault tolerance for transportation systems
  6. Fault tolerance for medical devices

Based on to the availability of COST Action IC1103 funding, authors of accepted contributions will be eligible for travel reimbursement. In case of limited budget availability, the selection of beneficiaries will be based on the following criteria, in priority order:
1) Young researchers (Master thesis / Ph.D. students);
2) Balance of allocation among different Working Groups;
3) First come first serve (date of submission of contribution).

Submission style

Perspective authors are invited to submit an abstract, maximum 4 pages, prepared according to the Springer format.
+ detailed description available on the Springer web site (link),
+ Word template: zip file,
+ Latex template: zip file

Paper Publication and Presenter Registration

Accepted abstracts will be published on the Workshop’s website. Every accepted paper must have at least one author registered to the symposium by the time the camera-ready abstract is submitted; the author is also expected to attend the workshop and present the contribution. Extended versions of the accepted abstracts are also eligible to undergo a second round of reviews in order to be published in a special issue of Springer’s Journal of Electronic Testing: Theory and Applications (JETTA).

Important Dates

  • Submission deadline: March 15, 2012 March 23, 2012
  • Notification of acceptance: April 15, 2012
  • Camera-ready full papers: April 30, 2012

For general information, contact the General co-Chairs. For paper submission information, contact the Program co-Chairs.

Registration to the workshop available at:

General co-Chairs

  • Marco Ottavi
    University of Rome “Tor Vergata”
  • Massimo Violante
    Politecnico di Torino

Program co-Chairs

  • Said Hamidioui
    Delft University of Technology

  • Hans Manhaeve
    Ridgetop Europe

Publicity Chair

  • Antonio Miele
    Politecnico di Milano

COST is supported by the EU Framework Programme Horizon 2020